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244

Sep 20, 2010
09/10

by
NON

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The implementation of this invention consists of two elements, the image gathering device and an image restoration filter algorithm. The image gathering device is implemented with an optical aperture control that allows one to change the spatial frequency response of the image gathering device for each one of the successive image acquisitions; the image restoration algorithm unscrambles the within-passband and aliased signal components in the presence of photosensor noise to produce an image...

Topics: PARALLEL PROCESSING (COMPUTERS), PIPELINING (COMPUTERS), PROGRAMMING LANGUAGES, ALGORITHMS,...

343
343

May 21, 2011
05/11

by
Wray, Richard B.; Stovall, John R

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This paper presents an overview of the application of the Space Generic Open Avionics Architecture (SGOAA) to the Space Shuttle Data Processing System (DPS) architecture design. This application has been performed to validate the SGOAA, and its potential use in flight critical systems. The paper summarizes key elements of the Space Shuttle avionics architecture, data processing system requirements and software architecture as currently implemented. It then summarizes the SGOAA architecture and...

Topics: ADDING CIRCUITS, DIGITAL FILTERS, FLOATING POINT ARITHMETIC, MULTIPLIERS, ARCHITECTURE (COMPUTERS),...

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272

Jul 26, 2010
07/10

by
Freed, A. D.; Walker, K. P

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A hypothesis is put forth which enables the viscoplastician to formulate a theory of viscoplasticity that reduces, in closed form, to the classical theory of creep. This hypothesis is applied to a variety of drag and yield strength models. Because of two theoretical restrictions that are a consequence of this hypothesis, three different yield strength models and one drag strength model are shown to be theoretically admissible. One of these yield strength models is selected as being the most...

Topics: ALGORITHMS, TARGETS, BINARY DATA, LOGIC PROGRAMMING, MATHEMATICAL PROGRAMMING, PIPELINING...

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324

May 30, 2011
05/11

by
Beggs, John H.; Briley, W. Roge

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An implicit characteristic-based approach for numerical solution of Maxwell's time-dependent curl equations in flux conservative form is introduced. This method combines a characteristic based finite difference spatial approximation with an implicit lower-upper approximate factorization (LU/AF) time integration scheme. This approach is advantageous for three-dimensional applications because the characteristic differencing enables a two-factor approximate factorization that retains its...

Topics: MESSAGES, LIBRARIES, FORTRAN, FLEXIBILITY, ARCHITECTURE (COMPUTERS), DISTRIBUTED MEMORY, DATA...

The Intensity Dependent Spread (IDS) is an adaptive algorithm which is modified according to the local intensity in the scene. (This results in a nonlinear process which cannot take advantage of rather nice linear transform methods.) The computation is similar to a neural net whereby intensity information is moving from each input pixel to a set of surrounding output pixels in a manner described by Cornsweet and Yellott. A prototype of a very large scale integration IDS processor is being...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, IMAGE PROCESSING, PIPELINING (COMPUTERS),...

The objective of this project is to support the Algorithm to Architecture Mapping Model (ATAMM) firing rules using the Mentat run-time system and the Mentat Programming Language (MPL). Specifically, this required changes to (1) modify the run-time system to control queue length and inhibit actor firing until required data tokens are available and space is available in the input queues of all of the direct descendent actors, (2) disallow the specification of persistent object classes in the MPL,...

Topics: NASA Technical Reports Server (NTRS), PARALLEL PROCESSING (COMPUTERS), PIPELINING (COMPUTERS),...

To compose the complicated systems using algorithmically specialized logic circuits or processors, one solution is to perform relational computations such as union, division and intersection directly on hardware. These relations can be pipelined efficiently on a network of processors having an array configuration. These processors can be designed and implemented with a few simple cells. In order to determine the state-of-the-art in Electrically Reconfigurable Logic Array (ERLA), a survey of the...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, LOGIC CIRCUITS, PIPELINING (COMPUTERS), SURVEYS,...

We present a state property called congruence and show how it can be used to demonstrate commutivity of instructions in a modern load-store architecture. Our analysis is particularly important in pipelined microprocessors where instructions are frequently reordered to avoid costly delays in execution caused by hazards. Our work has significant implications to safety and security critical applications since reordering can easily change the meaning and an instruction sequence and current...

Topics: NASA Technical Reports Server (NTRS), ARCHITECTURE (COMPUTERS), CONGRUENCES, MICROPROCESSORS,...

COSMIC/NASTRAN was converted to the CRAY computer systems. The CRAY version is currently available and provides users with access to all of the machine independent source code of COSMIC/NASTRAN. Future releases of COSMIC/NASTRAN will be made available on the CRAY soon after they are released by COSMIC.

Topics: NASA Technical Reports Server (NTRS), COMPUTER SYSTEMS PERFORMANCE, CRAY COMPUTERS, NASTRAN,...

In this study the following questions are addressed. Is it possible to improve the parallelization efficiency of the Thomas algorithm? How should the Thomas algorithm be formulated in order to get solved lines that are used as data for other computational tasks while processors are idle? To answer these questions, two-step pipelined algorithms (PAs) are introduced formally. It is shown that the idle processor time is invariant with respect to the order of backward and forward steps in PAs...

Topics: NASA Technical Reports Server (NTRS), PARALLEL PROCESSING (COMPUTERS), ALGORITHMS, PIPELINING...

This paper proposes a new high-performance paradigm for accessing removable media such as tapes and especially magneto-optical disks. In high-performance computing the striping of data across multiple devices is a common means of improving data transfer rates. Striping has been used very successfully for fixed magnetic disks improving overall system reliability as well as throughput. It has also been proposed as a solution for providing improved bandwidth for tape and magneto-optical...

Topics: NASA Technical Reports Server (NTRS), BANDWIDTH, DATA MANAGEMENT, DATA STORAGE, MAGNETIC DISKS,...

The Manipulator Emulator Testbed (MET) is to provide a facility capable of hosting the simulation of various manipulator configurations to support concept studies, evaluation, and other engineering development activities. Specifically, the testbed is intended to support development of the Space Station Remote Manipulator System (SSRMS) and related systems. The objective of this study is to evaluate the math models developed for the MET simulation of a manipulator's rigid body dynamics and the...

Topics: NASA Technical Reports Server (NTRS), MANIPULATORS, PARALLEL PROCESSING (COMPUTERS), PIPELINING...

The barrier is a synchronization construct which is useful in separating a parallel program into parallel sections which are executed in sequence. The completion of a barrier requires cooperation among all executing processes. This requirement not only introduces the wait for the slowest process delay which is inherent in the definition of the synchronization, but also has implications for the efficient implementation and measurement of barrier performance in different systems. Types of barrier...

Topics: NASA Technical Reports Server (NTRS), ARCHITECTURE (COMPUTERS), MULTIPROCESSING (COMPUTERS),...

An architecture to evaluate a 24-bit floating-point sum or difference of products using modified sequential carry-save multipliers with extensive pipelining is described. The basic building block of the architecture is a carry-save multiplier with built-in mantissa alignment for the summation during the multiplication cycles. A carry-save adder, capable of mantissa alignment, correctly positions products with the current carry-save sum. Carry propagation in individual multipliers is avoided and...

Topics: NASA Technical Reports Server (NTRS), ADDING CIRCUITS, DIGITAL FILTERS, FLOATING POINT ARITHMETIC,...

The problem of optimally assigning the modules of a parallel program over the processors of a multiple computer system is addressed. A Sum-Bottleneck path algorithm is developed that permits the efficient solution of many variants of this problem under some constraints on the structure of the partitions. In particular, the following problems are solved optimally for a single-host, multiple satellite system: partitioning multiple chain structured parallel programs, multiple arbitrarily...

Topics: NASA Technical Reports Server (NTRS), ARCHITECTURE (COMPUTERS), DISTRIBUTED PROCESSING, PARALLEL...

A design approach for high speed normalization of digital signals was developed. A reciprocal look up table technique is employed, where a digital value is mapped to its reciprocal via a high speed memory. This reciprocal is then multiplied with an input signal to obtain the normalized result. Normalization improves considerably the accuracy of certain feature identification algorithms. By using the concept of pipelining the multispectral sensor data processing rate is limited only by the speed...

Topics: NASA Technical Reports Server (NTRS), DIGITAL SYSTEMS, PATTERN RECOGNITION, SIGNAL PROCESSING,...

The problem of solving banded linear systems by direct (non-iterative) techniques on the Vector Processor System (VPS) 32 supercomputer is considered. Two efficient direct methods for solving banded linear systems on the VPS 32 are described. The vector cyclic reduction (VCR) algorithm is discussed in detail. The performance of the VCR on a three parameter model problem is also illustrated. The VCR is an adaptation of the conventional point cyclic reduction algorithm. The second direct method...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, COMPUTATION, LINEAR EQUATIONS, SUPERCOMPUTERS,...

A 3-by-3 convolver utilizes 9 binary arithmetic units connected in cascade for multiplying 12-bit binary pixel values P sub i which are positive or two's complement binary numbers by 5-bit magnitide (plus sign) weights W sub i which may be positive or negative. The weights are stored in registers including the sign bits. For a negative weight, the one's complement of the pixel value to be multiplied is formed at each unit by a bank of 17 exclusive or gates G sub i under control of the sign of...

Topics: NASA Technical Reports Server (NTRS), COMPUTER COMPONENTS, CONVOLUTION INTEGRALS, DATA PROCESSING...

This paper presents a strategy for efficiently rendering time-varying volume data sets on a distributed-memory parallel computer. Time-varying volume data take large storage space and visualizing them requires reading large files continuously or periodically throughout the course of the visualization process. Instead of using all the processors to collectively render one volume at a time, a pipelined rendering process is formed by partitioning processors into groups to render multiple volumes...

Topics: NASA Technical Reports Server (NTRS), PIPELINING (COMPUTERS), PARALLEL COMPUTERS, DISTRIBUTED...

The problem is addressed to find a 1-1 mapping of the vertices of a binary tree onto those of a target binary tree such that the son of a node on the first binary tree is mapped onto a descendent of the image of that node in the second binary tree. There are two natural measures of the cost of this mapping, namely the dilation cost, i.e., the maximum distance in the target binary tree between the images of vertices that are adjacent in the original tree. The other measure, expansion cost, is...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, BINARY DATA, LOGIC PROGRAMMING, MATHEMATICAL...

A comparative study is made between the Algorithm to Architecture Mapping Model (ATAMM) and three other related multiprocessing models from the published literature. The primary focus of all four models is the non-preemptive scheduling of large-grain iterative data flow graphs as required in real-time systems, control applications, signal processing, and pipelined computations. Important characteristics of the models such as injection control, dynamic assignment, multiple node instantiations,...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, DATA FLOW ANALYSIS, MULTIPROCESSING (COMPUTERS),...

A Reed-Solomon decoder with dedicated hardware for five sequential algorithms was designed with overall pipelining by memory swapping between input, processing and output memories, and internal pipelining through the five algorithms. The code definition used in decoding is specified by a keyword received with each block of data so that a number of different code formats may be decoded by the same hardware.

Topics: NASA Technical Reports Server (NTRS), DECODERS, ERROR CORRECTING CODES, GALILEO PROJECT, SPACECRAFT...

The problem of optimally assigning the modules of a parallel/pipelined program over the processors of a multiple computer system under certain restrictions on the interconnection structure of the program as well as the multiple computer system was considered. For a variety of such programs it is possible to find linear time if a partition of the program exists in which the load on any processor is within a certain bound. This method, when combined with a binary search over a finite range,...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, COMPUTER SYSTEMS PROGRAMS, PARALLEL PROGRAMMING,...

In this paper, we propose a new heuristic scheduling algorithm based on the statistical analysis of the cumulative frequency distribution of operations among control steps. It has a tendency of escaping from local minima and therefore reaching a globally optimal solution. The presented algorithm considers the real world constraints such as chained operations, multicycle operations, and pipelined data paths. The result of the experiment shows that it gives optimal solutions, even though it is...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, HARDWARE DESCRIPTION LANGUAGES, HEURISTIC...

A systolic algorithm and an array for bidiagonalization of an nxn matrix in O(nlog(2)n) time, using O(n to the 2nd power) cells are given. Bandedness of the input matrix may be effectively exploited. If the matrix is banded, with p nonzero subdiagonals and q nonzero superdiagonals, then 4nln(p + q) + O(n) clocks and 2n(p + q) + O((p + q) to the 2nd power + n) cells are needed. This is faster than the best previously reported result by the factor log(2)e = 1.44.... Moreover, in contrast to...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, ARCHITECTURE (COMPUTERS), COMPUTATION,...

Many computational problems in image processing, signal processing, and scientific computing are naturally structured for either pipelined or parallel computation. When mapping such problems onto a parallel architecture it is often necessary to aggregate an obvious problem decomposition. Even in this context the general mapping problem is known to be computationally intractable, but recent advances have been made in identifying classes of problems and architectures for which optimal solutions...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, MAPPING, PARALLEL PROCESSING (COMPUTERS),...

Various aspects of reliable computing are formalized and quantified with emphasis on efficient fault recovery. The mathematical model which proves to be most appropriate is provided by the theory of graphs. New measures for fault recovery are developed and the value of elements of the fault recovery vector are observed to depend not only on the computation graph H and the architecture graph G, but also on the specific location of a fault. In the examples, a hypercube is chosen as a...

Topics: NASA Technical Reports Server (NTRS), ARCHITECTURE (COMPUTERS), FAULT TOLERANCE, GRAPH THEORY,...

Message passing is among the most popular techniques for parallelizing scientific programs on distributed-memory architectures. The reasons for its success are wide availability (MPI), efficiency, and full tuning control provided to the programmer. A major drawback, however, is that incremental parallelization, as offered by compiler directives, is not generally possible, because all data structures have to be changed throughout the program simultaneously. Charon remedies this situation through...

Topics: NASA Technical Reports Server (NTRS), MESSAGES, ARCHITECTURE (COMPUTERS), DISTRIBUTED MEMORY, DATA...

A parallel programming methodology, called the force, supports the construction of programs to be executed in parallel by an unspecified, but potentially large, number of processes. The methodology was originally developed on a pipelined, shared memory multiprocessor, the Denelcor HEP, and embodies the primitive operations of the force in a set of macros which expand into multiprocessor Fortran code. A small set of primitives is sufficient to write large parallel programs, and the system has...

Topics: NASA Technical Reports Server (NTRS), FORTRAN, MEMORY (COMPUTERS), MULTIPROCESSING (COMPUTERS),...

Digital values in a moving window are compared by an operator having nine comparators connected to line buffers for receiving a succession of central pixels together with eight neighborhood pixels. A single bit of program control determines whether the neighborhood pixels are to be compared with the central pixel or a threshold value. The central pixel is always compared with the threshold. The omparator output plus 2 bits indicating odd-even pixel/line information about the central pixel...

Topics: NASA Technical Reports Server (NTRS), COMPARATORS, COMPUTER COMPONENTS, DATA PROCESSING EQUIPMENT,...

The Sparsely Distributed Memory (SDM) developed by Kanerva is an unconventional memory design with very interesting and desirable properties. The memory works in a manner that is closely related to modern theories of human memory. The SDM model is discussed in terms of its implementation in hardware. Two appendices discuss the unconventional approaches of the SDM: Appendix A treats a resistive circuit for fast, parallel address decoding; and Appendix B treats a systolic array for high...

Topics: NASA Technical Reports Server (NTRS), CODING, MEMORY (COMPUTERS), PARALLEL PROCESSING (COMPUTERS),...

A technique was developed to allow the Aero Grid and Paneling System (AGPS), a geometry and visualization system, to be used as a dynamic real-time geometry monitor, manipulator, and interrogator for other codes. This technique involves the direct connection of AGPS with one or more external codes through the use of Unix pipes. AGPS has several commands that control communication with the external program. The external program uses several special subroutines that allow simple, direct...

Topics: NASA Technical Reports Server (NTRS), APPLICATIONS PROGRAMS (COMPUTERS), COMPUTATIONAL GEOMETRY,...

The efficient implementation of algorithms on multiprocessor machines requires that the effects of communication delays be minimized. The effects of these delays on the performance of a model problem on a hypercube multiprocessor architecture is investigated and methods are developed for increasing algorithm efficiency. The model problem under investigation is the solution by red-black Successive Over Relaxation YOUN71 of the heat equation; most of the techniques described here also apply...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, COMMUNICATION, DELAY, MESSAGE PROCESSING,...

This presentation describes a project, formal verification of the microcode in the AAMP5 microprocessor, conducted to explore how formal techniques for specification and verification could be introduced into an industrial process. Sponsored by the Systems Validation Branch of NASA Langley and by Collins Commercial Avionics, a division of Rockwell International, it was conducted by Collins and the SRI International Computer Science Laboratory. The project consisted of specifying in the PVS...

Topics: NASA Technical Reports Server (NTRS), COMPUTER PROGRAMS, FAULT TOLERANCE, MICROPROCESSORS,...

A ground station was built in Brazil to receive, record, and process TM data from LANDSAT satellites. The receiving/recording subsystem and the processing subsystem are discussed. Functional design specifications for the facility are addressed.

Topics: NASA Technical Reports Server (NTRS), BRAZIL, DATA PROCESSING, GROUND STATIONS, REMOTE SENSING,...

The Navier-Stokes computer is a parallel computer designed to solve Computational Fluid Dynamics problems. Each processor contains several floating point units which can be configured under program control to implement a vector pipeline with several inputs and outputs. Since the development of an effective compiler for this computer appears to be very difficult, machine level programming seems necessary and support tools for this process have been studied. These support tools are organized into...

Topics: NASA Technical Reports Server (NTRS), COMPUTATIONAL FLUID DYNAMICS, NAVIER-STOKES EQUATION,...

Techniques developed for the finite-precision implementation of digital filters were used, adapted, and extended for digital feedback compensators, with particular emphasis on steady state, linear-quadratic-Gaussian compensators. Topics covered include: (1) the linear-quadratic-Gaussian problem; (2) compensator structures; (3) architectural issues: serialism, parallelism, and pipelining; (4) finite wordlength effects: quantization noise, quantizing the coefficients, and limit cycles; and (5)...

Topics: NASA Technical Reports Server (NTRS), COMPENSATORS, CONTROLLERS, DIGITAL SYSTEMS, FEEDBACK CONTROL,...

This exploratory study initiated our inquiry into algorithms and applications that would benefit by latency tolerant approach to algorithm building, including the construction of new algorithms where appropriate. In a multithreaded execution, when a processor reaches a point where remote memory access is necessary, the request is sent out on the network and a context--switch occurs to a new thread of computation. This effectively masks a long and unpredictable latency due to remote loads,...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, COMPUTATION, INTERPROCESSOR COMMUNICATION,...

A new very large scale integration (VLSI) design of a pipeline Reed-Solomon decoder is presented. The transform decoding technique used in a previous article is replaced by a time domain algorithm through a detailed comparison of their VLSI implementations. A new architecture that implements the time domain algorithm permits efficient pipeline processing with reduced circuitry. Erasure correction capability is also incorporated with little additional complexity. By using a multiplexing...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, ARCHITECTURE (COMPUTERS), DECODERS, DESIGN...

The Navier-Stokes computer is a high-performance, reconfigurable, pipelined machine designed to solve large computational fluid dynamics problems. Due to the complexity of the architecture, development of effective, high-level language compilers for the system appears to be a very difficult task. Consequently, a visual programming methodology has been developed which allows users to program the system at an architectural level by constructing diagrams of the pipeline configuration. These...

Topics: NASA Technical Reports Server (NTRS), COMPUTATIONAL FLUID DYNAMICS, COMPUTERS, NAVIER-STOKES...

The present status of numerical methods for partial differential equations on vector and parallel computers was reviewed. The relevant aspects of these computers are discussed and a brief review of their development is included, with particular attention paid to those characteristics that influence algorithm selection. Both direct and iterative methods are given for elliptic equations as well as explicit and implicit methods for initial boundary value problems. The intent is to point out...

Topics: NASA Technical Reports Server (NTRS), BOUNDARY VALUE PROBLEMS, FLUID DYNAMICS, PARALLEL COMPUTERS,...

The past ten years of research on computer vision have matured into a powerful real time system comprised of standardized commercial hardware, computers, and pipeline processing laboratory prototypes, supported by anextensive set of image processing algorithms. The software system was constructed to be transportable via the choice of a popular high level language (PASCAL) and a widely used computer (VAX-11/750), it comprises a whole realm of low level and high level processing software that has...

Topics: NASA Technical Reports Server (NTRS), COMPUTER VISION, IMAGE PROCESSING, REAL TIME OPERATION,...

In picture processing an important problem is to identify two digital pictures of the same scene taken under different lighting conditions. This kind of problem can be found in remote sensing, satellite signal processing and the related areas. The identification can be done by transforming the gray levels so that the gray level histograms of the two pictures are closely matched. The transformation problem can be solved by using the packing method. Researchers propose a VLSI architecture...

Topics: NASA Technical Reports Server (NTRS), ARCHITECTURE (COMPUTERS), COMPARISON, IDENTIFYING, IMAGES,...

Problems which can arise with vector and parallel computers are discussed in a user oriented context. Emphasis is placed on the algorithms used and the programming techniques adopted. Three recently developed supercomputers are examined and typical application examples are given in CRAY FORTRAN, CYBER 205 FORTRAN and DAP (distributed array processor) FORTRAN. The systems performance is compared. The addition of parts of two N x N arrays is considered. The influence of the architecture on the...

Topics: NASA Technical Reports Server (NTRS), ARCHITECTURE (COMPUTERS), CDC COMPUTERS, COMPUTATION,...

We present a systematic approach to decompose and incrementally build the proof of correctness of pipelined microprocessors. The central idea is to construct the abstraction function by using completion functions, one per unfinished instruction, each of which specifies the effect (on the observables) of completing the instruction. In addition to avoiding the term size and case explosion problem that limits the pure flushing approach, our method helps localize errors, and also handles stages...

Topics: NASA Technical Reports Server (NTRS), MICROPROCESSORS, COMPUTER SYSTEMS DESIGN, PIPELINING...

This paper gives an overview of the research being conducted at Stanford University's Space, Telecommunications, and Radioscience Laboratory in the area of low energy computation. It discusses the work we are doing in large scale digital VLSI neural networks, interleaved processor and pipelined memory architectures, energy estimation and optimization, multichip module packaging, and low voltage digital logic.

Topics: NASA Technical Reports Server (NTRS), ARCHITECTURE (COMPUTERS), ELECTRONIC PACKAGING, MEMORY...

The Model SP-320 device is a monolithic realization of a complex general purpose signal processor, incorporating such features as a 32-bit ALU, a 16-bit x 16-bit combinatorial multiplier, and a 16-bit barrel shifter. The SP-320 is designed to operate as a slave processor to a host general purpose computer in applications such as coherent integration of a radar return signal in multiple ranges, or dedicated FFT processing. Presently available is an I/O module conforming to the Intel Multichannel...

Topics: NASA Technical Reports Server (NTRS), ATMOSPHERICS, COMPUTER NETWORKS, COMPUTER SYSTEMS DESIGN,...

This report describes the experiences of Collins Avionics & Communications and SRI International in formally specifying and verifying the microcode in a Rockwell proprietary microprocessor, the AAMP-FV, using the PVS verification system. This project built extensively on earlier experiences using PVS to verify the microcode in the AAMP5, a complex, pipelined microprocessor designed for use in avionics displays and global positioning systems. While the AAMP5 experiment demonstrated the...

Topics: NASA Technical Reports Server (NTRS), MICROPROCESSORS, MICROPROGRAMMING, PROGRAM VERIFICATION...

Methods for efficient computation of numerical algorithms on a wide variety of MIMD machines are proposed. These techniques reorganize the data dependency patterns to improve the processor utilization. The model problem finds the time-accurate solution to a parabolic partial differential equation discretized in space and implicitly marched forward in time. The algorithms are extensions of Jacobi and SOR. The extensions consist of iterating over a window of several timesteps, allowing efficient...

Topics: NASA Technical Reports Server (NTRS), ALGORITHMS, JACOBI MATRIX METHOD, PARALLEL PROCESSING...

This paper describes an algorithm for the scheduling of time-critical rendering and computation tasks on single- and multiple-processor architectures, with minimal pipelining. It was developed to manage scientific visualization scenes consisting of hundreds of objects, each of which can be computed and displayed at thousands of possible resolution levels. The algorithm generates the time-critical schedule using progressive-refinement techniques; it always returns a feasible schedule and, when...

Topics: NASA Technical Reports Server (NTRS), COMPUTER GRAPHICS, MULTIPROCESSING (COMPUTERS), REAL TIME...